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Identifying “Store Into Instruction Stream” (SIIS) Inefficiency by Using CPU MF Counters



Document Author:

John Burg


Document ID:

WP102806


Doc. Organization:

Advanced Technical Sales


Document Revised:

12/11/2019


Product(s) covered:

z13; z13s; z14; z15; z/OS







Abstract: This document describes a new technique to identify Store Into Instruction Stream (SIIS) inefficiency by using CPU MF Counters.

There are several components to the document. This paper describes what is SIIS, CPU MF Counters and the new metric, SIIS Indicator %, along with thresholds and recommended actions. Also provided are the slides that accompany the paper.

In addition, there is also a link to a 2006 TechDocs that describes the processor design considerations and the code it expects to execute.

Finally, there is a paper that contains remediation examples of assembler programs with SIIS impacts.


Identifying “Store Into Instruction Stream” (SIIS) Inefficiency by Using CPU MF Counters - PaperIdentifying SIIS Inefficiency by Using CPU Counters paper.pdfIdentifying SIIS Inefficiency by Using CPU Counters paper.pdf
Identifying “Store Into Instruction Stream” (SIIS) Inefficiency by Using CPU MF Counters - Slides Identifying SIIS Inefficiency by Using CPU MF Counters slides.pdfIdentifying SIIS Inefficiency by Using CPU MF Counters slides.pdf
2006 TechDocs: IBM System z and eserver zSeries Processor Performance Design Considerations http://www.ibm.com/support/techdocs/atsmastr.nsf/WebIndex/FLASH10208
IBM Z System: Remediation of Assembler Programs with SIIS Impacts




Classification:

Software

Category:

Performance




Platform(s):

IBM Z

S/W Pillar(s):

IBM System z Software

O/S:

z/OS

Keywords:

SIIS z/OS Efficiency Assembler, z15, z14, z13, #IBMZPERF, #IBMZCAPPLAN

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