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Silicon nanosheet transistors at 5nm

  • Silicon nanosheet transistors at 5nm

    Silicon nanosheet transistors at 5nm

    Date added: 05 Jun 2017

    Pictured: a scan of IBM Research Alliance’s 5nm transistor, built using an industry-first process to stack silicon nanosheets as the device structure – achieving a scale of 30 billion switches on a fingernail-sized chip that will deliver significant power and performance enhancements over today’s state-of-the-art 10nm chips. (Credit: IBM)