Custom logic

ASIC design systems for a connected world.

They are the challenges that companies in the semiconductor industry hear from customers every day: give me more performance, better power efficiency, more integration. And get it right the first time, on time.

The answer doesn’t rest in simply implementing the next generation of semiconductor technology. Increasingly, overcoming these kinds of challenges means exploiting advances resulting from sustained, multi-faceted R&D. Taking advantage of innovative application-optimized silicon, intellectual property (IP) and packaging solutions. And leveraging proven expertise in overcoming the complexities associated with designing in advanced technology nodes.

Ranked as the number one ASIC (custom logic) suppler for wired communications year after year, IBM has helped bring some of the world’s most sophisticated semiconductor solutions to life, from client chips that are fueling the communications network transformation to IBM custom logic used in today’s top systems and supercomputers. Clients can benefit from IBM’s comprehensive custom logic portfolio, R&D advances, decades of design and technology experience and the end-to-end integration of design tools, methodology and device manufacturing — an industry-unique blend of insight, innovation, technology, resources and capabilities.

IBM custom logic offerings feature both silicon-on-insulator (SOI) and CMOS design platforms geared for a range of networking, storage and performance-driven applications.

Custom Logic Roadmap. SOI. Cu-45. Cu-32. Bulk. Cu-08. Cu-65. Technology Node. 90 nm. 65 nm. 45nm. 32 nm.

Intellectual property

The IBM custom logic portfolio features leading-edge embedded memories, enhanced by algorithmic multiport memory structures at 32 nm; high-speed SERDES (HSS) cores; and embedded processors, all designed to deliver differentiated functionality, performance, reliability and density. To help maximize design flexibility, IBM offerings are complemented by state-of-the-art, third-party IP specifically tuned for IBM technologies.

3D packaging innovation

IBM Cu-32 (PDF, 903KB) takes packaging innovation to new levels. A unique die stacking architecture, using 3D through silicon vias (TSV), provides the ability to mix and match logic, memory and technology nodes and delivers significantly increased functional density, lower power and higher performance. Die stacking is a semi-custom offering, available on a limited basis.

Design methodology

The IBM design methodology—featuring statistical timing and backed by expert support—can help simplify the integration of differentiating design elements in even the most complex designs. The design methodology supports both IBM and leading industry-standard design tools, and is designed to help you achieve first-pass design success. IBM’s holistic design approach features concurrent chip and package design to help you get the most out of your design, beyond silicon and IP alone.

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Custom Logic Roadmap. SOI. Cu-45. Cu-32. Bulk. Cu-08. Cu-65. Technology Node. 90 nm. 65 nm. 45nm. 32 nm.

IBM custom logic roadmap

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  • IBM Cu-32 (903KB)

    One of the industry’s fastest TCAMs. 28G SERDES. Learn more about IBM’s 32 nm, HKMG custom logic offering.

  • IBM Cu-45 (209KB)

    Read more about IBM’s pioneering 45 nm, SOI-based custom logic offering.

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