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Archive white papers

PowerPC

  
PowerPC & POWER2 Whitepapers
Selected papers from: PowerPC and POWER2: Technical Aspects of the New IBM RS/6000 (IBM Corporation, SA23-2737). Detailed technical whitepapers on POWER2 and PowerPC architecture, hardware implementation, performance, compilers, and more.
POWER2: Next Generation of the RS/6000 Family
POWER2 CPU-Intensive Workload Performance
POWER2 Performance on Engineering/Scientific Applications
POWER2 Commercial Workload Performance
POWER2 Floating-Point Unit: Architecture and Implementation
POWER2 Fixed-Point, Data Cache, and Storage Control Units
POWER2 Instruction Cache Unit
POWER2 Performance Monitor
Algorithm and Architecture Aspects of Producing ESSL BLAS on POWER2
PowerPC Architecture: A High-Performance Architecture with a History
PowerPC 601 Microprocessor
PowerPC 603 Microprocessor
POWER, POWER2, and PowerPC Migration and Compatibility
Using the XL Compiler Options to Improve Application Performance
POWER2 Architecture Implementations
This paper discusses the differences between the current POWER2 processor implementations in terms of: data cache size, second level cache (L2 cache) and processor to data cache interface widths, and the resulting performance characteristics for Integer, Floating Point and Commercial Transaction Processing applications. The performance discussions are based on SPECint92, SPECfp92, LINPACK and TPC-C benchmark results.
POWER3: Next generation 64-bit PowerPC Processor Design
This white paper provides a technical description of the POWER3 processor architechture and technology.