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This document describes the system architecture of the IBM eServer™ pSeries 680. The major components; processors, memory, I/O subsystem, and the interconnecting buses are all described. The key aspect of this design is architectured balanced performance using the newly developed copper and silicon-on-insulator (SOI) processor technology.
The pSeries 680 represents IBM's symmetric multiprocessing (SMP) server for high-end commercial performance. It is ideally poised for the future because it supports running concurrently both 32-bit and 64-bit applications. It uses the new SOI technology enhanced RS64 IV processors and is offered in 6-, 12-, 18-, and 24-way configurations. The p680 also includes an enhanced L2 16MB cache and an increased memory size (96GB) for large database transactions.
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