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Continued improvements in superscalar processor architectures
and increasing transistor density means that it is possible to
enhance superscalar, pipelined instruction execution paradigm.
So far, superscalar capability was limited to a single thread, i.e.
instructions from only a single thread can be scheduled during a
clock cycle. Now it is possible to design a processor with many
instructions in flight from many different threads of execution
during a single clock cycle. The IBM POWER5™ processors
bring this capability, called simultaneous multi-threading to the
mainstream computing.
By executing multiple threads on the same processor at the
same time, simultaneous multi-threading enables concurrent
execution of multiple instruction streams to help optimize
processor utilization. AIX 5L™ V5.3 operating system and
POWER5 processors on IBM eServer® i5 and p5 systems fully automate
simultaneous multi-threading without requiring any application
modifications or tuning.
This paper provides an overview of the POWER5
simultaneous multi-threading implementation, how IBM AIX 5L
V5.3 enables simultaneous multi-threading and how DB2®
Universal Database™ Enterprise Server Edition exploits this
technology for higher performance.
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