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IBM eServer™ p5 575 applies IBM POWER5 chip technology in a cluster building-block approach to help meet the requirements of high-performance technical and commercial computing. With the performance advantages provided by the powerful POWER5 processors and their associated system architecture, a fast system bus, high memory bandwidth and robust input/output (I/O) subsystems, the 8-core and 16-core p5-575 systems provide the greatest sustainable memory bandwidth per fully populated rack of any IBM UNIX® environment clustered server. The p5-575 supports the AIX 5L V5.2, AIX 5L V5.3, SUSE LINUX® Enterprise Server 9 (SLES 9) for POWER, and Red Hat Enterprise Linux AS 3 (RHEL AS 3) for POWER or above operating systems (OSs). Its performance and enhanced clustering alternatives combined make the p5-575 a versatile solution for many demanding high performance computing (HPC) client requirements.
The p5-575 is available both in 1.9GHz 8-core or 1.5GHz 16-core symmetric multiprocessing (SMP) server cluster nodes. Multiple p5-575 servers can be configured in distributed clusters. Up to 12 p5-575 modules can be contained in a single 24-inch IBM system frame, providing leading-edge performance in a very dense package. Building on over a decade of IBM RS/6000® SP and IBM eServer pSeries® 655 supercomputing experience, the p5-575, the successor to the p655, is ideal for computationally-intensive and data-intensive workloads in science, engineering, business intelligence and data warehousing. This white paper describes the currently available 8-core and 16-core p5-575 servers, including potential performance enhancing characteristics, extreme scalability and configuration versatility.
The p5-575 reflects innovative, simplified modular packaging which is designed for enhanced reliability and extraordinary versatility. The p5-575 has eight memory DIMM slots connected to the integrated memory controllers of each of the eight POWER5 chips. The total of 64 DIMM slots supports an aggregate memory capacity of up to 256GB per node, with a peak data transfer speed of up to 12.7 GB/sec per POWER5 chip (i.e., 12.7 GB/sec per core in the 8-core configuration or 6.3 GB/sec per core in the 16-core configuration). The DIMMs are located in close proximity to the associated POWER5 chip, effectively minimizing signal propagation delays. In addition, the p5-575 implementation allows processors to communicate over a high-speed SMP fabric, as opposed to the I/O-based switch fabric required to interconnect multiple 2-core or 4-core systems. The larger SMP configuration of the p5-575 helps reduce the overall cost of computing by minimizing network infrastructure cost, base I/O and storage hardware cost and, in some cases, memory cost. In addition, fewer servers require less management and maintenance.
The p5-575 power distribution and conversion systemadapted from the p5-595 server designrelies on embedded circuitry rather than external wiring to distribute power among system components with the objective of providing more reliable and efficient power distribution. In addition, the p5-575 uses IBM's leading-edge rack level distributed power conversion architecture designed to maximize system density, simplify power connection and provide a robust redundant system power supply arrangement. Two simple neutral free universal line cords connect the p5-575 system frame to a client's facility anywhere in the world with no adjustments required to personalize for power utility voltage or frequency. Support for 200v to 240v; 380v to 415v; and 480v, 3 phase power inputs allow US clients to enjoy reduced facility equipment cost and help improve energy efficiency. The ability for the p5-575 to tolerate client utility power disturbances is exceptional in comparison to most other computing equipment, and optional internal battery back-up helps the p5-575 system ride through a momentary utility power interruption without the need for large and expensive UPS systems.
Finally, the unique p5-575 node implementation has only four field-replaceable components; the I/O subsystem, the DC power converter/lid, the processor and memory planar, and the cooling system. Each of these components are custom-designed to satisfy the demanding requirements of very high-performance, very high density computing.
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