|
In this paper, we first provide an overview of the HPS switch and adapters and IBM System p™
server characteristics that impact performance of parallel applications using MPI and IP.
Application characteristics and the time the server takes to process the communication protocol
stack determine how much of the HPS performance capability can be realized by parallel
applications.
We also provide a brief overview of the switch and associated building blocks of the overall high
performance computing (HPC) cluster, and describe our own experiences in benchmarking MPI
and TCP/IP performance on these systems. Two different System p servers were used in this
study: System p5 575 with 1.9 and 2.2 GHz POWER5+ processors. Measurements were done
using AIX 5L V5.3, with various page sizes and simultaneous multithreading (SMT) settings.
The rest of the paper is organized as follows. In Section 2, we review the high level architecture
and design of the HPS switch. In Section 3, we describe the supported configurations. Section 4
provides detailed performance results of our experiences running our MPI benchmark. Some
general observations about environment settings and an outline of how users can make use of
them are provided. TCP/IP performance results are provided in Section 5. Section 6 provides
some application benchmarks.
Previous versions of this paper have provided data on other System p servers. The reader is
referred to those documents for prior data at
http://www.ibm.com/common/ssi/apilite?infotype=SA&infosubt=
WH&lastdays=1825&hitlimit=200&ctvwcode=US&pubno=PSW*USEN&
appname=STG_PS_USEN_WH&additional=summary&contents=keeponlit.
|
