The Model 168 gained its power largely from a combination of (1) ultra-high-speed buffer storage, (2) operation of the instruction unit's logic circuitry, which capitalized on the availability of instructions and data from the buffer, and (3) a high degree of concurrency in operation. The operation of the instruction unit was overlapped, allowing up to three instructions to be undergoing preparation concurrently so that the next program-sequenced instruction was ready for execution. Introduced with the 168 were an additional register and instruction buffer to increase overlap, and reorganization of the optional 16K buffer to gain speed.
New or extended features of the Model 168 were designed for high availability, eased application development, and operational flexibility, with emphasis on the needs of large data base and data communications systems. They also were designed for more flexible growth paths to meet the needs of application development and changing workloads. These features included virtual storage and multiprocessing capabilities and the availability of up to eight megabytes of integrated monolithic processor storage with a Model 168.